J. Kissel, D. Sigg, D. Barker
ECR E2100485
WP 12901

Continuing on the deprecation of 18-bit DAC path (ECR E2100485), we upgraded the h1iscex's DAC0 card yesterday from an 18- to a 20-bit DAC (LHO:88333). One of the front-end models that use that DAC is the h1calex model.

In this aLOG, I discuss the front-end model changes we implemented to support this change.

I show the differences in before vs. after in the following screenshots. All changes were made at the top level of the model, no library parts were changed.
    - Top level model BEFORE vs. AFTER.
        Functional Changes:
        :: Changed the CDS part representation of the DAC from a 18- to 20-bit DAC.
        :: Added a constant of 4.0 ***, whose output is piped into a goto tag, CAL_FACTOR.
        :: The CAL_FACTOR from tag is first piped into a EPICs read back for display on MEDM (and for recording in frames), which will manifest as the channel H1:CAL-EX_DAC_CAL_FACTOR
        :: Then CAL_FACTOR is piped into multiplication blocks downstream of the DAC outputs such that the two channels used by the model CH5 and CH6 (with the count starting at 0; CH6 and CH7 in the analog world where counting starts at 1)

        Aesthetic Changes:
        :: Added the modern labels for direct IO chassis and inter-(computer)-process communication
        :: Detached the RFM IPC that ships the PCAL excitations to the corner station from its direct wire pick-off and "changed" it's input to be the tag that already exists to ship the signal to the DAC
        :: Moved that IPC system down to the left under the "new" RFM section, which allows for the model to conform to modern convention of having clear/clean separate sections for "input" "controls" and "output."
        :: Changed the color of the CDS parameters block to be orange, as is standard.

     - Another view of the top level to better highlight which signals are multiplied by four, and where in the signal change BEFORE vs. AFTER

The h1calex model has been committed, and rev-updated to to 
    /opt/rtcds/userapps/release/cal/h1/models/
        h1calex.mdl         r23189 --> r34056


*** Because this model houses both the PCAL system, Hardware Injection and the DuoTone system -- critical flywheels for the detector calibration, we decided to implement our usual gain scaling of (exactly) 4.0x to compensate for the change in calibration (from 20/2^18 to 20/2^20 [ Vpp_differential / ct]) the DAC card upgrade as a hard-coded constant in the front-end, rather than in an "adjustable/changeable" filter module in a filter bank just upstream of the DAC output.