jeffrey.kissel@LIGO.ORG - posted 16:42, Thursday 11 December 2025 - last comment - 17:20, Thursday 11 December 2025(88486)
Allegedly Stuck SRM M3 UL Low-pass Binary IO Switch
J. Kissel, J. Driggers, A. Effler Trying to figure out why SRC1 loop, which is the fast AS_A_RF72 loop that drives controls SRM is being finicky, I pulled open the H1 SUS SRM coil driver binary IO state request screen (see attached) and found that the UL low pass (LP) bit on the M3 stage stage is allegedly stuck -- it doesn't change when I go from state 1 (LP OFF, ACQ OFF), to state 3 (LP ON, ACQ OFF). The rest of the coils on the M3 stage change when receiving the same request. I say "allegedly" because it can be either the actual switch is stuck (the BO chassis) or the readback has failed / is stuck (the BI chassis). To be investigated...
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Seems this bit has been stuck on and off since Feb 21 (for state 1 of M3 0 is good and 1 is bad in the attached ndscope). Also attached I put the spectra of the FASTIMONs which are after the analog switches. The state 1 spectra look the same as before, and the state 3 spectra looked the same anyway, so more likely that the readback has gone bad.
I further checked that PRM/PR2/BS/ITMX/ITMY do the correct BIO switching from high noise to low noise, according to their readbacks. I have not double checked the spectra.
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