Jeff, Oli

We made several updates to multiple SUS simulink models as a continuation of our work converting SUSB123 and SUSH34 into SUSB13 and SUSB2H34 (88765). Our changes were based on our updated G2301306-v10_PARTII - for the conversion from SUSH34 into SUSB2H34 for PR2, we referenced slides 8, 10, 14, 15, 20, and 21. These changes were svn'd as r34387 and were installed and started last week (88781).

These are the changes we had to make for h1suspr2:

CDS Parameter Block:
- Changed hostname from h1sush34 to h1susb2h34
- Removed specific_cpu

Output (before, after):
- Changed DACs from multiple 18 bit DACs to one 20 bit DAC and one 28 bit DAC
- Lined up outputs to their corresponding DAC channels

Jeff, Oli

We made several updates to multiple SUS simulink models as a continuation of our work converting SUSB123 and SUSH34 into SUSB13 and SUSB2H34 (88765). Our changes were based on our updated G2301306-v10_PARTII - for the conversion from SUSH34 into SUSB2H34 for SR2, we referenced slides 8, 10, 14, 15, 20, and 21. These changes were svn'd as r34385 and were installed and started last week (88781).

These are the changes we had to make for h1sussr2:

CDS Parameter Block:
- Changed hostname from h1sush34 to h1susb2h34
- Removed specific_cpu

Input (before, after):
- Changed ADC to OSEM channels for M1 RT and SD

Output (before, after):
- Changed DACs from multiple 18 and 20 bit DACs to one 20 bit DAC and one 28 bit DAC
- Lined up outputs to their corresponding DAC channels

Jeff, Oli

We made several updates to multiple SUS simulink models as a continuation of our work converting SUSB123 and SUSH34 into SUSB13 and SUSB2H34 (88765). Our changes were based on our updated G2301306-v10_PARTII - for the conversion from SUSH34 into SUSB2H34 for MC2, we referenced slides 8, 10, 14, 15, 20, and 21. These changes were svn'd as r34384 and were installed and started last week (88781).

These are the changes we had to make for h1susmc2:

CDS Parameter Block:
- Changed hostname from h1sush34 to h1susb2h34
- Removed specific_cpu

Input (before, after):
- Removed ADC1 since now all OSEM channels are on ADC0
- Redid ADC to OSEM configuration
- Added BS BIO channels for each BS stage (coming in from BS) to SHMEM since the BS BIO is now on the MC2 model

Output (before, after):
- Changed DACs from multiple 18 bit DACs to one 28 bit DAC
- Lined up outputs to their corresponding DAC channels
- Added BS BIO channels for each BS stage (going out to BS) to SHMEM
- Changed ADC channels going to SR3 oplev in PCIE

Binary I/O (before, after):
- Added BS to BIO ENCODE and DECODE blocks
- Added BIO cards for BS
- Added inputs and outputs to BIO blocks for BS

Jeff, Oli

We made several updates to multiple SUS simulink models as a continuation of our work converting SUSB123 and SUSH34 into SUSB13 and SUSB2H34 (88765). Our changes were based on our updated G2301306-v10_PARTII - for the conversion from SUSB123 into SUSB13 for ITMY, we referenced slides 5, 7, 12, 13, 18, and 19. These changes were svn'd as r34388 and were installed and started last week (88781).

These are the changes we had to make for h1susitmy:

CDS Parameter Block:
- Changed hostname from h1susb123 to h1susb13
- Removed specific_cpu

Input (before, after):
- Removed ADC1 since now all OSEM channels are on ADC0
- Redid ADC to OSEM configuration
- Removed ITMY L3 BIO channel (coming from BS) from SHMEM
- Added ITMX L3 BIO channel (coming in from ITMX L3) to SHMEM since the L3 BIO is now on the ITMY model

Output (before, after):
- Changed DACs from several 20 bit DACs to two 28 bit DACs
- Lined up outputs to their corresponding DAC channels
- Lined up ESD bias and ESD sum outputs to their corresponding DAC channels
- Removed ITMY L3 BIO channel (that went out to BS) from SHMEM
- Added ITMX L3 BIO channel (that goes out to ITMX) to SHMEM since L3 BIO is now on the ITMY model

Binary I/O (before, after):
- Added ITMX L3 and ITMY L3 BIO inputs and routing into the ITMY_BIO_ENCODE block
- Added the ITMX L3 and ITMY L3 BIO out cards
- Added ITMX L3 and ITMY L3 BIO routing into the ITMY_BIO_DECODE block and outputs
- Removed the HWWD_CONTROL input from the ITMY_BIO_ENCODE block and removed the wire going into it from the ITMY_HWWD_BIN_OUT block since there is no physical cable there

Jeff, Oli

We made several updates to multiple SUS simulink models as a continuation of our work converting SUSB123 and SUSH34 into SUSB13 and SUSB2H34 (88765). Our changes were based on our updated G2301306-v10_PARTII - for the conversion from SUSB123 into SUSB13 for ITMX, we referenced slides 5, 7, 12, 13, 18, and 19. These changes were svn'd as r34388 and were installed and started last week (88781).

These are the changes we had to make for h1susitmx:

CDS Parameter Block:
- Changed hostname from h1susb123 to h1susb13
- Removed specific_cpu

Input (before, after):
- Removed ADC1 since now all OSEM channels are on one ADC (called ADC1 in diagrams)
- Redid ADC to OSEM configuration
- Changed name of SHMEM channel that comes in for ITMX L3 BIO
    - Previously was H1:SUS-ITMX_BIO_L3_MON_SHMEM, now is H1:SUSITMY_2_ITMX_L3_BIOMON_SHMEM

Output (before, after):
- Changed DACs from several 20 bit DACs to two 28 bit DACs
- Lined up outputs to their corresponding DAC channels
- Lined up ESD bias and ESD sum outputs to their corresponding DAC channels
- Changed name of SHMEM channel that goes out for ITMX L3 BIO
    - Previously was H1:SUS-ITMX_BIO_L3_CTRL_SHMEM, now is H1:SUSITMY_2_ITMX_L3_BIOCTRL_SHMEM

Jeff

The SUS rack photos for SUS-C1 (S1301868-v1), SUS-C2 (S1301869-v2 ), SUS-C5 (S1301872-v6), and SUS-C6 (S1301873-v3) have been updated with new photos taken after our upgrade last week. Rack photos prior to this upgrade are linked with the previous version of each rack.

We also have gone ahead in those same DCC SUS rack documents and updated the e-travelers and related documents for each rack, listing the currently installed electronics types and serial numbers.

Closes FAMIS39851, last checked in alog88771

Everything looks as it did during the last check, no real changes over the past week that I can see.

Thu Jan 22 10:05:43 2026 INFO: Fill completed in 5min 39secs

Jennie W, Rahul K, Jason O, Keita K

Rahul and Jason installed body mode dampers on the JAC, we did not expect it this to change the position of the JAC much.

Thinking of what could have cause this there are two possibilities:

1. Installing the body mode dampers moved the JAC.
2. The B & K hammering on Tuesday (see alog # 88822) of the input HAM1 periscope somehow shifted its mirrors.

After installation we tried to lock and could not. Checking the output of the JAC we could not see flashes. Lookign at the input coupler of JAC on a card the beam seems high coming into the JAC.

Jason and I recovered the alignment into the JAC somewhat with the PSL persicope PZT and the "JM1" fixed mirror which sits right after the HAM1 input periscope.

We finally managed to lock the JAC (altered the guardian timeout thredhold which checks the power level - I marked what I changed in the code so I can reverse it).

Below I include a comparison of the last time we were locked last Friday 16th, this is nominally in mW but we have not checked the calibration of this PD yet.

Yesterday afternoon we took this image of the locked level and it is worse by a factor of 2, see this image.

Keita suggested we do a scan with the on board PZT while the cavity was unlocked.

Taking the measured hom spacing which Masayuki and I measured in this unit at CIT, 1.75 radians and the FSR, caluclated from 1/time period between TM00 modes, we estimate the 01 mode is 0.75 of the FSR.

The scan of the transmitted beam in blue makes it look like we have two candidates for this 01 mode that are between 70 and 50% of the height of the TM00 mode, so we are most likely mis-aligned. The scan voltage is in red.

Last week we had aligned into HAM2 and out of the viewport that normally delivers the beam to IOT2L. We checked this late in the afternoon and the beam gets through the MC REFL periscope on the table and through one mirror, then clips on BS1.

This makes it likely that our output alignment has not changed badly and so we can go ahead with aligning the output of the JAC.

Our plan today is to spend half an hour checking the JAC is not locking to a HOM and then try and improve the alignment ontpo IOT2L with JM2 and JAC_M3 mirrors in HAM1.

We still have irises at the output of the HAM1 table, one of which was placed at the old output beam position before we installed the input periscope or the JAC cavity, so we will try and improve the line through this iris and onto IOT2L.

Yesterday the EOM arrived midday, Keita and Rahul concentrated on building this in the optics lab, this will continue to be worked on today.

Per WP12989 we completed the EOM cable install from PLS-R2 to the HAM-1 feedthrough.  The old EOM cables from the PSL were disconnected at the patch panel, and the RF Combiner was powered down.  RF Cables were landed at the patch panel from left to right, 24MHz, 118MHz, 45MHz, 9MHz, with 2 empty spigots on the right hand side of the panel located at U2 in the rack near the floor.  We will shoot these with the TDR to once everything is installed to get total electrical length for calibration.

M. Pirello, F. Clara

TITLE: 01/22 Day Shift: 1530-0030 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Planned Engineering
OUTGOING OPERATOR: None
CURRENT ENVIRONMENT:
    SEI_ENV state: MAINTENANCE
    Wind: 5mph Gusts, 3mph 3min avg
    Primary useism: 0.03 μm/s
    Secondary useism: 0.17 μm/s 
QUICK SUMMARY:

• HAM1 work today, EOM installation and JAC mode matching
• A 4.7 from Wyoming rolled through ~3 hours ago
• The LVEA remains in LASER HAZARD

TITLE: 01/22 Day Shift: 1530-0030 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Planned Engineering
INCOMING OPERATOR: None
SHIFT SUMMARY: OPO and JAC work continued in HAMs 1 & 7 in LASER HAZARD.
LOG:                                                                                                                                                                                                       

19:24 OPO WD trip

FAMIS 31121

Things are looking very stable over the past week; makes sense since very little has been asked of the PSL recently. The PMC and RefCav could still use an alignment touch-up, which I'll get to hopefully this week.

Jeff, Oli

We decided to rename the SR3 OPLEV Whitening to AA chassis cable from SUS_SR3-168 to SUS_OPLEV_SR3_AA. We decided to do this for a couple reasons: SUS_SR3-168 is not a very helpful name, it matches better with the other OPLEVs' cables, and anyway we had already been calling that cable SUS_OPLEV_SR3_AA in our wiring diagrams for a while. 
We relabeled both sides of the cable.

[Sheila, Ryan, Karmeng]

We have returned ZM2 to the original position at the beginning of O4, we alleviated some of the saturation but the ZM3 iris still require adjustment.

Power budget looks good so far. With 0.77mW exiting the OPO and reaches AM3 at the same power. We observed 0.75mW of OPO trans and 18.1mW of OPO refl on SQZT7 periscope.

Jason. JennieW, Rahul

This morning we added the damper parts to the JAC in HAM1 chamber - see picture attached. The cables were re-routed slightly so that they don't interfere with the damper.

I have finger tightened the screws of the damper for now - since no torque spec was provided and we were worried that tightening them too much might affect its position/angle.

Yesterday I picked up the shipment from LLO contain the 2nd HXDS (first HXDS shipment alog87998) and related ASSEYs and brought it to the Triples lab. 

Uwrapping and inspecting was uneventful, the zip ties were intact, the shock pads untripped and the humidity indicator was unchanged in color. The outer (front, back) and inner (front, back) bags were in good condition, unwrapping the suspension I found no play with the blades.  All the nuts and dowel pins were tight and well seated, the ICS looks good except for it seems to be missing the HDS Intermediate Mass Fixture (D2000230-V1, s/n 08). The part is scribed as V1, on the dcc there's a V2 with two added 8-32 helicoils taps that, based on D1900352 which uses V2, I should be able to see from the front and I don't, so this is a V1 plate and not an incorrectly scribed V2. I believe these two missing 8-32 holes are where we will attach the BOSEM Mounting plate (D2000257). The first HXDS we received in November had the V2 plate. We may have to do a small rework to update it to V2, or have LLO send the V2 part if possible.

The pre-filters were replaced in the FCES air handler. 

J. Kissel
ECR E2500296, E2400409
WP 12962

D2300401 (for susb13) and D2300383 (for susb2h34)

We begin the major upgrade of the H1SUSB123 and H1SUSH34 SUS and SEI Systems converting them to SUSB13 and SUSH34 a la G2301306 today. We're focusing on upgrading the DACs in the IO chassis () and all the downstream surrounding impact of that  analog electronics This will take down the following computers, and they will be resurrected with new names as follows:
    FORMER NAME           FORMER SUS              NEW NAME           NEW SUS
    h1susb123             ITMX, ITMY, BS          h1susb13           ITMX, ITMY
    h1sush34              MC2, PR2, SR2           h1susb2h34         BS, MC2, PR2, SR2, LO1, LO2
    h1susauxb123          ITMX, ITMY, BS          h1susauxb13        ITMX, ITMY
    h1susauxh34           MC2, PR2, SR2           h1susauxb2h34      BS, MC2, PR2, SR2, LO1, LO2

As such, I've 
    - brought the ITMX, ITMY, BS, HAM3, and HAM4 SEI systems to ISI_DAMPED_HEPI_OFFLINE (so we don't risk any "hard" trips of HEPI during all this).
    - brought all impacted SUS gaurdians to AUTO mode, then to the SAFE state
    - Increased the bypass time on all impacted software watchdogs to bypass time to a large number (90000000 secs), and hit BYPASS