Added the cabling for the new whitening concentrators. This also required a software upgrade.

The following QPD whitening channels were affected:

• IMC-MC2_TRANS
• IMC-IM4_TRANS
• PSL-ISS_SECONDLOOP_QPD
• PSL-BES_A
• ASC-POP_A
• ASC-POP_B

Instead of 4 x 8-bits, only 1 x 8 bits are used and all 4 segments are switched simulatanously. There is no change in the whitening interface for these QPDs, since the software already tied the segments together. The only change is in the readnback bits where only the last 8-bits are still significant.

This allowed us to add the whitening for the JAC WFS as well as dewhitening for the JAC PZT driver.

F. Clara, J. Figueroa, J. Kissel, M. Pirello
ECR E2400409 and E2500296 (IIET 35739 and 35706, respectively)
WP 12901
DWG D0902810-v12
DCN E2500341

Today we've gone forward with merging the sush2a and sush2b IO chassis, facilitated by upgrading those SUS's DAC cards to 32 CH, 28- bit DACs (D2200368). This entry covers the analog electronics and cabling that were impacted by the change, covering that all of the suspensions in, or soon to be in HAM1 and HAM2 -- MC1, MC3, PRM, PR3, IM1, IM2, IM3, IM4, RM1, RM2, PM1, JM1, and JM3.

We followed changes outlined in E2500341 which highlights the changes in the sush12 SUS electronics system drawing from D0902810-v11 to D0902810-v12. 
That required 
    - disconnecting all affected AI output cables in SUS-C3 and SUS-C4,
    - Removing the existing 6x 2x 8CH DAC AI chassis (D1000305), 
    - modifying them to become D2500353 1x 32CH AI chassis 
        . replacing the 2x 8CH AI rear panel with WD relays (D1000551) with 1x 32CH AI rear panel without WD relays (D2500097)
        . replacing the 2x 8CH back panel (https://dcc.ligo.org/LIGO-D1000552 with 1x 32CH back panel (D2400308)
    - re-installing, then
    - cabling everything up according to the D0902810-v12 version of the wiring diagram.

Here's the list of modified AI chassis serial numbers and assignment:
                                                     D1000305 > D2500353     D2500097
SUS Chain                     Rack / Position        Chassis S/N             Rear Board S/N          32CH DAC Card / IO Slot      Channels (Counting from 0)
MC1, MC3, PRM TOPs            SUS-C4 / U30           S1104370                S2501311                DAC0 / #2                     0-15
PRM, PR3 TOPs MC1 MID BOT     SUS-C4 / U29           S1104374                S2501315                DAC0 / #2                    16-31

MC3, PRM MID/BOT              SUS-C4 / U22           S1104375                S2501310                DAC1 / #4                     0-15
PR3 MID/BOT, RM1, RM2         SUS-C4 / U21           S1104378                S2501312                DAC1 / #4                    16-31

IM1, IM2, IM3, IM4            SUS-C4 / U10           S1104377                S2501314                DAC2 / #5                     0-15
PM1, JM1, and JM3             SUS-C4 /  U2           S1102760**              S2501313                DAC2 / #5                    16-31

** Technically, the (now) PM1, JM1, and JM3 AI chassis S1102760 was a 16-bit DAC AI chassis (D1101521) instead of a D1000305 at the start of today, and it didn't *need* the additional 16CH pass-through SCSI connection, but in the spirit of making everything the same, we elected to make it a full "new normal" D2500353 chassis.

While I was checking the suspensions this morning I noticed that the OPO sus guardian was in SAFE but there was still output going to the suspension. Trending the channels it looks like SDF revert was reverting the channels that the node had set in its SAFE state. I unmonitored these channels, see attached.

It looks like all other suspensions on this model are in a similar situation, but I'll wait to do those when the SQZ team isn't actively working in HAM7

Because CDS got an early start on SUSH12 work, we had to bypass the IOP wd to reisolate HAM1 HEPI to lock. Otherwise this went as normal. Angular deviations are all still <5 urad, location deviations are all slightly larger, still below 10um though.

Jennie W

I made a mistake in naming the block for the JAC LSC PD. It should be "REFL_A" and instead I named it "RF43" since there is also a RF43 block inside the "REFL_A block", this made the channel names "H1:JAC-REFL_A_RF43_RF43" which is unwieldy. Fixed it in the h1lsc model, built it on the h1build computer and not its committed to the svn at userapps/lsc/h1/models/

The RFPD block is shown in this picture with its new name. and the contents of this block is shown here.

J. Kissel

After offloading the IMC WFS (LHO:88510), and saving alignment offsets in respective safe.snaps (LHO:88511 and LHO:88512), I've brought all SUS on the h1sush2a and hsush2b computers to SAFE (that's MC1, MC3, PRM, PR3 and IM1, IM2, IM3, IM4, RM1, RM2, PM1, respectively). I've also brought the HAM1 and HAM2 SEI systems to ISI_DAMPED_HEPI_OFFLINE.

This is all in prep for the h1sush2a and h1sush2b merge into h1sush12, which is coincident with the DACs in these chassis getting upgraded to 32 CH 28-bit DACs per ECRs E2400409 and E2500296 scheduled via WP 12901.

J. Kissel


Saved opticalign alignment sliders for SUS on the h1sush2b computer in the h1susim and h1sushtts models; 
    h1susim
        H1SUSIM1
        H1SUSIM1
        H1SUSIM1
        H1SUSIM1
    h1sushtts (which will become h1susham1)
        H1SUSRM1
        H1SUSRM2
        H1SUSPM1

Ready for the h1sush2a + h1sush2b = h1sush12 IO chassis merge!

J. Kissel

Saved opticalign alignment sliders in H1SUSMC1, MC3, PRM, and PR3 models. In particular, after I offloaded the IMC WFS (see LHO:88510).

J. Kissel

In prep for for the sush12 upgrade, I've offloaded the IMC WFS to the MC1, MC2, and MC3 OPTICALIGN sliders. This was done with the built in "MCWFS_OFFLOADED" state in the IMC_LOCK guardian. There wasn't too much alignment change requested by the WFS's control signal; just ~5 counts on MC1 and MC3.
I'll now save the alignment offsets into the SUS safe.snaps.

TITLE: 12/15 Day Shift: 1530-0030 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Planned Engineering
OUTGOING OPERATOR: None
CURRENT ENVIRONMENT:
    SEI_ENV state: MAINTENANCE
    Wind: 25mph Gusts, 19mph 3min avg
    Primary useism: 0.05 μm/s
    Secondary useism: 0.44 μm/s 
QUICK SUMMARY: Gate valves 5 & 7 closed, plan is to vent the CS and start the SUS CDS upgrade. Vent meeting at 830 in the control room today to coordinate.

Sun Dec 14 10:06:15 2025 INFO: Fill completed in 6min 11secs

Sat Dec 13 10:01:33 2025 INFO: Fill completed in 1min 32secs

Quick fill, has been burping LN2 over past day.

[Keita, Daniel, Karmeng]

Particle counter acting up (black screen when we move the stand, and high particle count for the first three measurement). Picture for comparison with hand held counter.

We remove all three cables connected to the old OPO, the PZT cable is wrapped with a foil as a marker.

The old OPO is removed, wrapped and kept in the bag used to store the new OPO. New OPO is placed in the chamber, but not bolted on.

TITLE: 12/13 Day Shift: 1530-0030 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Planned Engineering
INCOMING OPERATOR: None
SHIFT SUMMARY:

IFO is in IDLE for Planned Engineering

TLDR - Last few big remaining lock health checks were successfully done.

First, initial alignment was ran successfully and automatically. 

We then started our day with 5 lock steps we wanted to confirm as working in the case that we could not fully lock:

• ISS Second Loop
  • Confirmed working by misaligning PRM and taking LASER_POWER to 62W and then closing the ISS Second Loop. Ryan S and I did this successfully.
• Lownoise ESD Transition
• Lownnoise Coil Driver States
• OMC_Whitening
• Laser Noise Suppression

To get around SRC1 P/Y instability, that would take time we don't have to fix, we locked while manually touching SRM at different times, notably: DRMI_LOCKED_CHECK_ASC, PREP_ASC_FOR_FULL_IFO, MOVE_SPOTS. However, after not being able to get past MOVE_SPOTS - couldn't keep RFPOP90 low enough with SRM touches, we tried a different method to get over the remaining checks suggested by Jenne:

1. Stop at 25W, touch SRM (counts on H1:LSC-POPAIR_B_RF90_I_NORM_MON good if under 12)
2. Manual to Lownoise Coil Drivers - Successful.
3. Auto until LOWNOISE_ESD_ETMX - Successful.
4. Manual to OMC Whitening, damp violins - Successful. Tony Damped violins.
5. Manual to Laser Noise Suppression - Mostly successful - Ryan S took care of this with advice from Keita about the scaling of the IMC_REFL and LSC_REFL IN1/2 and Fast Gain Servo Gains.

For a very comprehensive summary of locking progress, check out Ryan S's Wonderful Alog 88498.

Lock Acquisitions:

1. Lockloss due to SRC1 P/Y at Prep_ASC_FOR_FULL_IFO. SRM railed prior.
2. Lockloss due to Technical Cleaning at HAM2. HAM2 WD Tripped. Cleaning stopped after this.
3. Lockloss due to failed SRM adaptation (with ops acting as SRC1) at MOVE_SPOTS
4. Lockloss at Laser Noise Suppression upon activation of IMC_REFL Fast Gain at 25W
5. Lockloss at Laser Noise Suppression upon activation of IMC_REFL Fast Gain at 25W - though this time we confirmed it was likely the fast gain since Keita and Ryan S stepped through the state with gains scaled to 25W.

Meanwhile,

• Technical cleaning was started at HAM1/HAM2 (but unknown if completed since after a WD trip, they stopped due to locking).
• HAM1 Cleanroom was turned on and prepped for Monday Vent (alog 88501)
• GV5 and 7 Hard-closed (alog 88499)
• HAM7 HV Turned off (alog 88497)
• HAM7 OPO work is way underway, with OPO in but not fully installed.

LOG: